org	00000h
Start_of_RAM:	equ	0x0800
			jp Get_address		;Skip over message		
			defm "Cpuville Z80 ROM v.2",0
Get_address:		in a,(0)		;Get address from input ports		
			ld l,a			
			in a,(1)		
			ld h,a			
			jp (hl)			;Jump to the address		
Port_Reflector:		in a,(0)		;Simple program to test ports
			out (0),a
			in a,(1)		
			out (1),a		
			jp Port_Reflector		
Simple_Counter:		ld a,000h		;One-byte counter for slow clock		
Loop_1:			out (0),a		
			inc a			
			jp Loop_1		
Count_to_a_million:	ld l,000h		;Two-byte (16-bit) counter		
			ld h,000h		;Clear registers		
Loop_2:			ld a,010h		;Count 16 times, then		
Loop_3:			dec a			
			jp nz,Loop_3		
			inc hl			;increment the 16-bit number			
			ld a,l			
			out (0),a		;Output the 16-bit number		
			ld a,h			
			out (1),a		
			jp Loop_2		;Do it again		
Program_loader:		ld hl,Start_of_RAM	;Load a program in RAM		
Loop_4:			in a,(1)		
			and 081h		;Check input port 1		
			jp z,Loop_4		;If switches 0 and 7 open, loop		
			ld b,080h		;OK, at least one switch closed		
			djnz $+0		;Debounce loop		
			and 080h		;Is the left switch (bit 7) closed?		
			jp nz,Start_of_RAM	;Yes, run loaded program		
			in a,(0)		;No, then right switch (bit 0) closed.		
			out (0),a		;Get byte from port 0, display on output		
			ld (hl),a		;Store it in RAM		
			ld a,0ffh		;Turn port 1 lights on (signal that		
			out (1),a		;a byte was stored)
Loop_5:			in a,(1)		;Wait for switch to open		
			and 001h		
			jp nz,Loop_5		
			ld b,080h		;Switch open, debounce		
			djnz $+0		
			ld a,l			;Put low byte of address on port 1		
			out (1),a
			inc hl			;Point to next location in RAM			
			jp Loop_4		;Do it again					
Memory_test:		ld hl,Start_of_RAM	;check RAM by writing and reading each location		
Loop_6:			in a,(1)		;read port 1 to get a bit pattern		
			ld b,a			;copy it to register b		
			ld (hl),a		;store it in memory		
			ld a,(hl)		;read back the same location		
			cp b			;same as reg b?			
			jp nz,Exit_1		;no, test failed, exit		
			inc hl			;yes, RAM location OK					
			jp Loop_6		;keep going		
Exit_1:			ld a,h			;display the address			
			out (1),a		;where the test failed		
			ld a,l			;should be 4K (cycled around to ROM)			
			out (0),a		;any other value means bad RAM					
			jp Memory_test		;do it again (use a different bit pattern)