Donn Stewart
13917 Deviar Dr
Centreville, VA 20120
dstew@cpuville.com

Designing, Building, and Selling Obsolete Computers -- for Educational Purposes -- since 2004

Programming and operation

The computer has a simple architecture. It has only one programmer-accessible register, the accumulator. Originally 12 bits wide, I added another 4 bits later to allow memory transfers. All load and store operations move data between memory and the accumulator, and the arithmetic-logical instructions use the accumulator as one operand, and data fetched from memory as the other. (The NOT operation, of course, only operates on the accumulator, and the operand in the instruction is ignored.) The results of arithmetic-logical operations are stored in the accumulator. Only the original 12 lower bits of the accumulator can be used for arithmetic-logical operations.

The computer has an instruction word size of 16 bits. The four leftmost bits of an instruction word are the operation code, and the 12 rightmost bits are the operand, like this:

In almost all cases, the operand is a memory address. In the case of the arithmetic-logical instructions the memory address holds the data that is to be operated on together with the data in the accumulator. For the load and store operations, the address is the source or target of the data to be moved. The one exception is the immediate load, LDI. In this case, the 12-bit operand value itself is placed in the accumulator. The various jump instructions use the operand as the target address, except the indirect jump JPI, in which the target address is held in the memory location pointed to by the operand. Here is the instruction set:

The address space of the computer matches the size of the instruction word operand, 12 bits or 4 kilowords. The memory and input/output ports are addressed in the same way--there are no special input or output instructions. The address space in the computer is laid out this way:

000h to 7FFh (2048 words) Programmable, read-only memory (ROM)
800h to BFFh (1024 words) Static random-access memory (RAM)
C00h to FFFh (1024 ports) Input/output (I/O)

There are 5 input and 5 output ports in the computer, on the memory input/output board. The switch inputs, LED outputs and byte switcher ports are 16 bits wide. The UART ports are eight bits wide. Only the low-order eight bits of the 16 bit accumulator are transferred in UART writes. In UART reads, the upper eight bits of the accumulator are padded with zeros. Here are the computer input and output ports:

The very first program I ran was a simple port reflector:

When this program was running, I knew the basic structure of the computer was sound. To further test the machine I wrote the following program. This finds the largest factor of an integer, input from DIP switch bank 1. It is the same program as that first run by the first true computer, the Manchester Mark I "Baby" in 1948. Of course, my instruction set is different than the "Baby's" which had only 7 instructions!

This program tests an essential subset of the instructions, including the arithmetic instructions and two of the conditional jumps. It also tests the RAM. After this, I decided to write a program loader (see below).

Computer operation

The final configuration of the finished computer allows the computer to receive a program by way of the serial port. The clock speed switch on the logic board is set to 1.8 MHz (position number 7 on). This results in a serial port baud rate of 9600. The input port 1 switches (lower bank) are set to B08Eh, as seen in the picture of the Memory-I/O board. When the computer is started (taken out of reset), it begins execution in ROM at location 000h. There is an instruction there that jumps to the I/O port location and executes whatever instruction it finds there. This feature was put in during the troubleshooting phase of development to allow testing of the computer using a variety of routines stored in ROM. To run a particular test, a jump to that test is put on the port 1 switches. B08Eh is JMP 08Eh. Location 08Eh is the entry point for the program loader (see below).

The computer's serial port is connected to a dumb terminal (or PC running a terminal program) set for 9600 baud, one stop bit, no parity. Power is applied to the computer with the Reset/Run switch in the Reset position. A garbage character may appear on the terminal screen. The programmer may clear the terminal screen if the terminal has this ability. The computer is switched to Run. At this point the computer is ready to take instructions.

Program Loader

This program is the "operating system" of the computer. It takes hex character input from a terminal and converts it to 16-bit instruction words which are loaded into RAM starting at 0x80A. Upon receiving a ctrl-c, it jumps to 0x80A and begins to execute the loaded instructions. It needs upper case characters for A-F. Note that since the character input is 8-bit, and the path through the ALU is 12 bit, there is no easy way to get the highest order nybble of a 16-bit instruction word from the UART into memory. I solved this problem by making a table that contains the high order nybbles. A table entry is selected by the first character of each instruction word, and subsequent characters are converted to binary and placed into the word using the ALU. Later, I built a byte-switcher port which can more directly get low-order data into the high-order accumulator bits, and from there into memory. The instruction table had a gap in it due to the ASCII values of the characters, so I put some constants in the gap to save space.

The instruction set has does not have an instruction for indexed memory access, which is used to access a table. However, indexing can be done indirectly with the following procedure. Two words of RAM are set aside, the first word for the indexed instruction, the second for a return instruction (JPI or JMP). The index value is loaded into the accumulator, and the instruction to be indexed is added (using the ADD instruction). Even though the ALU is only 12 bits wide, the procedure works because the upper 4 bits of the accumulator will always contain the upper 4 bits of the most recently accessed value in memory. The indexed instruction is then placed in the RAM location set aside for it, then a JMP to that location is performed. After the instruction is finished, the return jump is performed. The program loader uses this technique. The base instructions are stored in the table gap in ROM at 0x07C and following, and there are RAM locations set aside for an indexed instruction and following return jump at 0x803 and 0x804.

There is a little patch of code at the end to allow the UART to divide its clock by 16. This helped character flow by improving start bit detection and bit framing. The program code can be entered at 0x027 or 0x08E. The program is in ROM at 0x027 because above it are some small test programs like the port reflector and factor routine. In its finished form, ROM has a JMP 0xC01 at the start. This instruction executes whatever instruction is on the lower DIP switches on the memory I/O board. In the picture, you can see the instruction word B08E there in the switches, which is JMP 08E.

Home-Built TTL CPU Program Loader

Links to Original CPU pages:

Original processor home

Overall design

Data path design

ALU design

Control design

Display

Memory and I/O

Programming

Schematics